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ax2 4c02a/04a/08a/16a 2k/4k/8k /16k-bit 2-wire serial cmos eeprom general descriptio features the ax24c02a/04a/08a/16a provides 2048/4096/8192/16384 bits of serial electrically erasable and programmable read-only memory (eeprom) organized as 256/512/1024/2048 words of 8 bits each. the device is optimized for use in many industrial and commercial applications where low- power and low-voltage operation are essential. the ax24c02a/04a/08a/16a is available in space-saving sop-8, tssop-8, dfn-8 and sot23-5 packages and is accessed via a two-wire serial interface. ? wide voltage operation - v cc = 1.8v to 5.5v ? operating ambient temperature: -40c to +85c ? internally organized: - ax24c02a, 256 x 8 (2k bits) - AX24C04A, 512 x 8 (4k bits) - ax24c08a, 1024 x 8 (8k bits) - ax24c16a, 2048 x 8 (16k bits) ? two-wire serial interface ? schmitt trigger, filtered inputs for noise suppression ? bidirectional data transfer protocol ? 1 mhz (5v), 400 khz (1.8v, 2.5v, 2.7v) compatibility ? write protect pin for hardware data protection ? 8-byte page (2k), 16-byte page (4k, 8k,16k) write modes ? partial page writes allowed ? self-timed write cycle (5 ms max) ? high-reliability - endurance: 1 million write cycles - data retention: 100 years ? sop-8, tssop-8, dfn-8 and sot23-5 packages sop-8 tssop-8 tdfn-8 sot23-5 p in configuration pin name functions a0 - a2 address inputs sda serial data scl serial clock input wp write protect gnd ground v cc power supply 1/16 pin assignment (top-view) rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
b lock diagram ax2 4c02a/04a/08a/16a 2/16 rev .1.1 jul.22, 2011 axe lite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
p in descriptions device/page addresses (a2, a1 and a0): the a2, a1 and a0 pins are device address inputs that are hard wired for the ax24c02a. eight 2k devices may be addressed on a single bus system (device addressing is discussed in detail under the device addressing section). the AX24C04A uses the a2 and a1 inputs for hard wire addressing and a total of four 4k devices may be addressed on a single bus system. the a0 pin is a no connect and can be connected to ground. the ax24c08a only uses the a2 input for hardwire addressing and a total of two 8k devices may be addressed on a single bus system. the a0 and a1 pins are no connects and can be connected to ground. the ax24c16a does not use the device address pins, which limits the number of devices on a single bus to one. the a0, a1, and a2 pins are no connects and can be connected to ground. serial data (sda): the sda pin is bi-directional for serial data transfer. this pin is open-drain driven and may be wire-ored with any number of other open-drain or open- collector devices. serial clock (scl): the scl input is used to positive edge clock data into each eeprom device and negative edge clock data out of each device. write protect (wp): the ax24c02a/04a/08a/16a has a write protect pin that provides hardware data protection. the write protect pin allows normal read/write operations when connected to ground (gnd). when the write protect pin is connected to v cc , the write protection feature is enabled and operates as shown in the following. write protect part of the array protected w p pin status ax24c02a AX24C04A ax24c08a ax24c16a at v cc full (2k) array full (4k) array full (8k) array full (16k) array at gnd normal read / write operations o rdering information available package types part number sop-8 tssop-8 dfn-8 sot23-5 ax 24c02a v v v v ax 24c04a v v v v ax 24c08a v v v v ax 24c16a v v v -- ax2 4c02a/04a/08a/16a 3/16 pa ckage type s: sop-8l g8: tssop-8l ax24c xxx x x pa cking blank : tube a : taping eeprom density 02a: 2k bits 04a: 4k bits 08a: 8k bits 16a: 16k bits z a: df n 2* 3 -8l b: sot23 -5l rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
m arking information package type part number marking marking information so p-8 ax24cxxasx t ssop-8 ax24cxxag8x 24cxxa yywwt so t23-5 ax24cxxabx 24cxxa xxxxx d fn-8 ax24cxxa ax cxxa xxxx xx is the memory of production. xxxxx is the last five number of wafer lot number. yyww is date code. t is tracking code ,t=x m emory organization ax24c02a, 2k serial eeprom: internally organized with 32 pages of 8 bytes each, the 2k requires an 8-bit data word address for random word addressing. AX24C04A, 4k serial eeprom: internally organized with 32 pages of 16 bytes each, the 4k requires a 9-bit data word address for random word addressing. ax24c08a, 8k serial eeprom: internally organized with 64 pages of 16 bytes each, the 8k requires a 10-bit data word address for random word addressing. ax24c16, 16k serial eeprom: internally organized with 128 pages of 16 bytes each, the 16k requires an 11-bit data word address for random word addressing. device operation clock and data transitions: the sda pin is normally pulled high with an external device. data on the sda pin may change only during scl low time periods (see to figure 1). data changes during scl high periods will indicate a start or stop condition as defined below. start condition: a high-to-low transition of sda with scl high is a start condition which must precede any other command (see to figure 2). stop condition: a low-to-high transition of sda with scl high is a stop condition. after a read sequence, the stop command will place the eeprom in a standby power mode (see figure 2). acknowledge: all addresses and data words are serially transmitted to and from the eeprom in 8-bit words. the eeprom sends a "0" to acknowledge that it has received each word. this happens during the ninth clock cycle. standby mode: the ax24c02a/04a/08a/16a features a low-power standby mode which is enabled: (a) upon power-up and (b) after the receipt of the stop bit and the completion of any internal operations. memory reset: after an interruption in protocol, power loss or system reset, any two-wire part can be reset by following these steps: 1. clock up to 9 cycles. 2. look for sda high in each cycle while scl is high. 3. create a start condition. ax2 4c02a/04a/08a/16a 4/16 z rev .1.1 jul.22, 2011 x xxxx x x is the memory of production. xxxxx is the last five number of wafer lot number. x x is the memory of production. xxxx is the last five number of wafer lot number. axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
f igure 1: data validity f igure 2: start and stop definition f igure 3: output acknowledge ax2 4c02a/04a/08a/16a 5/16 rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
d evice addressing the 2k, 4k, 8k and 16k eeprom devices all require an 8-bit device address word following a start condition to enable the chip for a read or write operation (see to figure 4). the device address word consists of a mandatory "1", "0" sequence for the first four most significant bits as shown. this is common to all the serial eeprom devices. the next 3 bits are the a2, a1 and a0 device address bits for the 2k eeprom. these 3 bits must compare to their corresponding hardwired input pins. the 4k eeprom only uses the a2 and a1 device address bits with the third bit being a memory page address bit. the two device address bits must compare to their corresponding hardwired input pins. the a0 pin is no connect. the 8k eeprom only uses the a2 device address bit with the next 2 bits being for memory page addressing. the a2 bit must compare to its corresponding hard-wired input pin. the a1 and a0 pins are no connect. the 16k does not use any device address bits but instead the 3 bits are used for memory page addressing. these page addressing bits on the 4k, 8k and 16k devices should be considered the most significant bits of the data word address which follows. the a0, a1 and a2 pins are no connect. the eighth bit of the device address is the read/write operation select bit. a read operation is initiated if this bit is high and a write operation is initiated if this bit is low. upon a compare of the device address, the eeprom will output a "0". if a compare is not made, the chip will return to a standby state. write operations byte write: a write operation requires an 8-bit data word address following the device address word and acknowledgment. upon receipt of this address, the eeprom will again respond with a "0" and then clock in the first 8-bit data word. following receipt of the 8-bit data word, the eeprom will output a "0" and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. at this time the eeprom enters an internally timed write cycle, twr, to the nonvolatile memory. all inputs are disabled during this write cycle and the eeprom will not respond until the write is complete (see figure 5). page write: the 2k eeprom is capable of an 8-byte page write, and the 4k, 8k and16k devices are capable of 16-byte page writes. a page write is initiated the same as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in instead, after the eeprom acknowledges receipt of the first data word, the microcontroller can transmit up to seven (2k) or fifteen (4k, 8k,16k) more data words. the eeprom will respond with a "0" after each data word received. the microcontroller must terminate the page write sequence with a stop condition (see figure 6). the data word address lower three (2k) or four (4k, 8k, 16k) bits are internally incremented following the receipt of each data word. the higher data word address bits are not incremented, retaining the memory page row location. when the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. if more than eight (2k) or sixteen (4k, 8k, 16k) data words are transmitted to the eeprom, the data word address will "roll over" and previous data will be overwritten. acknowledge polling: once the internally timed write cycle has started and the eeprom inputs are disabled, acknowledge polling can be initiated. this involves sending a start condition followed by the device address word. the read/write bit is representative of the operation desired. only if the internal write cycle has completed will the eeprom respond with a "0", allowing the read or write sequence to continue. ax2 4c02a/04a/08a/16a 6/16 rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
r ead operations read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to "1". there are three read operations: current address read, random address read and sequential read. current address read: the internal data word address counter maintains the last accessed address, and incremented by one. but for ax24c16a, only lower 8 bits of the internal data word address counter maintains the last accessed address, the higher 3 bits (p2, p1, p0) will follow the device address input at each current address read. this address stays valid between operations as long as the chip power is maintained. the address "roll over" during read is from the last byte of the last memory page to the first byte of the first page. the address "roll over" during write is from the last byte of the current page to the first byte of the same page. once the device address with the read/write select bit set to "1" is clocked in and acknowledged by the eeprom, the current address data word is serially clocked out. the microcontroller does not respond with an input "0" but does generate a following stop condition (see figure 7). random read: a random read requires a "dummy" byte write sequence to load in the data word address. once the device address word and data word address are clocked in and acknowledged by the eeprom, the microcontroller must generate another start condition. the microcontroller now initiates a current address read by sending a device address with the read/write select bit high. the eeprom acknowledges the device address and serially clocks out the data word. the microcontroller does not respond with a "0" but does generate a following stop condition (see figure 8). sequential read: sequential reads are initiated by either a current address read or a random address read. after the microcontroller receives a data word, it responds with an acknowledge. as long as the eeprom receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. when the memory address limit is reached, the data word address will "roll over" and the sequential read will continue. the sequential read operation is terminated when the microcontroller does not respond with a "0" but does generate a following stop condition (see figure 9). ax2 4c02a/04a/08a/16a 7/16 rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
f igure 4: device address f igure 5: byte write f igure 6: page write ax2 4c02a/04a/08a/16a 8/16 rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
f igure 7: current address read f igure 8: random read f igure 9: sequential read ax2 4c02a/04a/08a/16a 9/16 rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
e lectrical characteristics absolute maximum stress ratings dc supply voltage -------------------------------------------------------------------------------------- -0.3v to +6.5v input / output voltage ----------------------------------------------------------------------------------- gnd-0.3v to v cc +0.3v operating ambient temperature --------------------------------------------------------------------- -40c to +85c storage temperature ------------------------------------------------------------------------------------ -65c to +150c comments stresses above those listed under "absolute maximum ratings" may cause permanent damage to this device. these are stress ratings only. functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. exposure to the absolute maximum rating conditions for extended periods may affect device reliability. dc electrical characteristics applicable over recommended operating range from: t a = -40c to +85c, v cc = +1.8v to +5.5v (unless otherwise noted) parameter symbol min. typ. max. unit condition su pply voltage v cc 1.8 5.5 v su pply current v cc = 5.0v i cc1 0.4 1.0 ma read at 100 khz su pply current v cc = 5.0v i cc2 2.0 3.0 ma write at 100 khz st andby current i sb 1.0 a v in = v cc or gnd i nput leakage current i li 3.0 a v in = v cc or gnd o utput leakage current i lo 0.05 3.0 a v out = v cc or gnd i nput low level v il -0.3 v cc x 0.3 v i nput high level v ih v cc x 0.7 v cc + 0.3 v o utput low level v cc =5.0v v ol3 0.4 v i ol = 3.0 ma o utput low level v cc =3.0v v ol2 0.4 v i ol = 2.1 ma o utput low level v cc =1.8v v ol1 0.2 v i ol = 0.15 ma p in capacitance applicable over recommended operating range from t a = 25c, f = 1.0 mhz, v cc = +1.8v parameter symbol min. typ. max. unit condition i nput/output capacitance (sda) c i/o - - 8 pf v i/o = 0v i nput capacitance (a0, a1, a2, scl) c in - - 6 pf v in = 0v ax2 4c02a/04a/08a/16a 10/16 rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
a c electrical characteristics applicable over recommended operating range from t a = -40c to +85c, v cc = +1.8v to +5.5v, cl = 1 ttl gate and 100 pf (unless otherwise noted) 1.8-volt 5.0-volt pa rameter symbol min. typ. max. min. typ. max. units c lock frequency, scl f scl - - 400 - - 1000 khz c lock pulse width low t low 1.2 - - 0.6 - - s c lock pulse width high t high 0.6 - - 0.4 - - s n oise suppression time t i - - 50 - - 40 ns c lock low to data out valid t aa 0.05 - 0.9 0.05 - 0.55 s t ime the bus must be free before a new transmission can start t buf 1.2 - - 0.5 - - s st art hold time t hd.sta 0.6 - - 0.25 - - s st art setup time t su.sta 0.6 - - 0.25 - - s d ata in hold time t hd.dat 0 - - 0 - - s d ata in setup time t su.dat 100 - - 100 - - ns i nputs rise time(1) t r - - 0.3 - - 0.3 s i nputs fall time(1) t f - - 300 - - 100 ns st op setup time t su.sto 0.6 - - 0.25 - - s d ata out hold time t dh 50 - - 50 - - ns w rite cycle time(for 04/16/16b) t wr1 - 3.3 5 - 3.3 5 ms w rite cycle time(for 02d/08d) t wr2 - 1.5 5 - 1.5 5 ms 5 .0v, 25c, byte mode endurance 1m - - - - - write cycles n ote 1. this parameter is characterized and is not 100% tested. 2. ac measurement conditions: r l (connects to v cc ): 1.3k (2.5v, 5v), 10k (1.8v) input pulse voltages: 0.3 v cc to 0.7 v cc input rise and fall time: Q 50 ns input and output timing reference voltages: 0.5 v cc the value of rl should be concerned according to the actual loading on the user's system. ax2 4c02a/04a/08a/16a 11/16 rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
b us timing figure 10: scl: serial clock, sda: serial data i/o w rite cycle timing figure 11: scl: serial clock, sda: serial data i/o n ote the write cycle time twr is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. 12/16 ax2 4c02a/04a/08a/16a rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
m echanical dimensions outline drawing sop 8 available package types ax24c02a/04a/08a/16a top view end view c ommon dimensions (unit of measure = mm) symbol min max a 1 .35 1.75 a1 0 .10 0.25 b 0 .31 0.51 c 0 .17 0.25 d 4 .70 5.10 e1 3 .80 4.00 e 5 .79 6.20 si de view e 1 .27 bsc l 0 .40 1.27 0 8 ax2 4c02a/04a/08a/16a 13/16 rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
m echanical dimensions outline drawing tssop 8 available package types ax24c02a/04a/08a/16a top view end view c ommon dimensions (unit of measure = mm) symbol min max d 2 .80 3.20 e 6 .20 6.60 e1 4 .20 4.60 a - 1 .20 a2 0 .80 1.15 b 0 .19 0.30 e 0 .65 bsc l 0 .45 0.75 si de view l 1 1.00 bsc 0 8 ax2 4c02a/04a/08a/16a 14/16 rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
m echanical dimensions outline drawing dfn-8 available package types ax24c02a/04a/08a/16a top view end view si de view bottom view c ommon dimensions (unit of measure = mm) symbol min max a 0 .70 0.80 a1 - 0 .05 b 0 .18 0.30 c 0 .18 0.25 d 1 .90 2.10 d 2 1.50 ref e 0 .50 bsc n d 1.50 bsc e 2 .90 3.10 e2 1 .60 bsc l 0 .30 0.50 h 0 .20 0.30 ax2 4c02a/04a/08a/16a 15/16 rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com
m echanical dimensions outline drawing sot23-5 available package types ax24c02a/04a/08a top view end view si de view bottom view c ommon dimensions (unit of measure = mm) symbol min max a 1 .05 1.30 a1 0 0 .10 a2 1 .00 1.20 a3 0 .55 0.75 b 0 .30 0.50 b 1 0.33 0.38 c 0 .10 0.21 c1 0 .14 0.16 d 2 .72 3.12 e 2 .60 3.00 e1 1 .40 1.80 e 0 .95 bsc l 0 .30 0.60 0 8 ax2 4c02a/04a/08a/16a 16/16 rev .1.1 jul.22, 2011 axelite confidential materials, do not copy or distribute without written consent . v?mw`r?y?b? www.gofotech.com

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